1. Field of Technology
The present invention generally relates to a video signal synthesizer operable to provide a multiplex video signal for producing a so-called picture-in-picture effect on a display screen of a display device, for example, a cathode ray tube.
2. Description of the Prior Art
A color television receiver of a type capable of reproducing a plurality of pictures simultaneously on one display screen of a cathode ray tube is well known and is currently commercially available. This video signal reproduction may be referred to as a picture-in-picture effect or a multiplexed picture reproduction, and is accomplished by the use of a video signal synthesizer which is generally incorporated in a television receiver and/or a video tape recording and/or reproducing apparatus although it is not always so limited. The prior art video signal synthesizer will be discussed in detail with reference to FIG. 2 of the accompanying drawings.
Referring to FIG. 2, reference numeral 11 represents a first input terminal adapted to be coupled to a first composite video signal representative of a main picture to be reproduced on the display screen, and reference numeral 15 represents a second input terminal adapted to be coupled to a second composite video signal representative of a sub-picture to be reproduced on the display screen on a reduced scale relative to the size of the main picture. The first input terminal 11 is connected to a first YC separator 12, which is in turn connected to a first chroma demodulator 13, and also with first sync separator 14. The second input terminal 15 is connected to a second YC separator 16, which is in turn connected to a second chroma demodulator 18, and also to a second sync separator 17. The first and second sync separators 14 and 17 are connected with respective first and second controllers 32 and 33 included in respective first and second digital signal processing circuits.
Reference numerals 19, 20 and 21 represent first, second and third analog-to-digital converters (A/D converters), respectively. These A/D converters 19 to 21 are connected to digital-to-analog converters (D/A converters) 25, 26 and 27 through digital memories 22, 23 and 24, respectively, each of said digital memories 22 to 24 being of a type capable performing both of information write-in and read-out at different timings.
Reference numeral 28 represents an analog switch assembly including three switches, reference numeral 29 represents a chroma modulator, reference numeral 30 represents a YC adder and reference numeral 31 represents an output terminal. It is to be noted that the first sync separator 14 and the first controller 32 altogether constitutes a timing control means 1 operable to control the timing a operation of the first to third digital memories 22 to 24, the timing of conversion performed by the first to third D/A converters 25 to 27 and the switching timing of the analog switch assembly 28.
The prior art video signal synthesizer of the construction described above is so designed as to operate in the following manner. The first composite video signal applied to the first input terminal 11 is fed to the first YC separator 12 operable to separate the first composite video signal into a first luminance signal 34 and a first color subcarrier signal 35. The first color subcarrier signal 35 is then applied to the first chroma demodulator 13 at which it is demodulated into a first red-color difference signal 36 and a first blue-color difference signal 37.
On the other hand, the second composite video signal applied to the second input terminal 15 is fed to the second YC separator 16 operable to separate the first composite video signal into a second luminance signal 38 and a second color subcarrier signal 39. The second color subcarrier signal 39 is then applied to the second chroma demodulator 18 at which it is demodulated into a second red-color difference signal 40 and a second blue-color difference signal 41.
The second luminance signal 38, the second red-color difference signal 40 and the second blue-color difference signal 41 are converted by the first, second and third A/D converters 19, 20 and 21 ino digital signals, respectively, and are then written in the associated first, second and third digital memories 22, 23 and 24. First and second control signals 42 and 43 required for the write-in control are generated from the controller 33 provided in the second digital signal processing circuit at a timing synchronized with a synchronizing signal 44 separated by the second sync separator 17, that is, the second color composite video signal.
When respective contents of the first to third digital memories 22 to 24 are to be read out, the reduction of the sub-picture, that is, the compression of the signal on the time axis, is effected. The time compression can be accomplished to 1/k if the speed of read-out operation is selected to be k-times the speed of write-in operation, wherein k is a positive integer. The second luminance signal 38, the second red-color difference signal 40 and the second blue-color difference signal 41 read out from the respective first to third digital memories 22 to 24 are in turn applied to the respective first to third D/A converters 25 to 27 whereat they are converted into the respective analog signals 45, 46 and 47, the analog signals 45 to 47 being the time-compressed versions of the second luminance signal 38, the red-color difference signal 40 and the blue-color difference signal 41 which are hereinafter referred to as a third luminance signal, a third red-color difference signal and a third blue-color difference signal, respectively. In other words, the second luminance sigal 38, the red-color difference signal 40 and the blue-color difference signal 41 are compressed in time through the second digital signal processing circuit to provide the third luminance signal 45, the third red-color difference signal 46 and the third blue-color difference signal 47, respectively. These signals 45 to 47 are in turn applied to the analog switch assembly 28.
Third and fourth control signals 48 and 49 required for the third luminance signal 45, the third red-color difference signal 46 and the third blue-color difference signal 47 to be read out from the digital signal processing circuit are generated from the controller 32 provided in the timing control circuit 1 at a timing synchronized with a synchronizing signal 50 separated by the first sync separator 14, from the first composite video signal which represents the main picture. Since the control signals 48 and 49 are synchronized with the first composite video signal, the third luminance signal 45, the third red-color difference signal 46 and the third blue-color difference signal 47 are also synchronized with the first composite video signal.
The analog switch assembly 28 is utilized to effect time-division multiplexing of the main picture signal and the sub-picture signal which has been time-compressed, and a switching command 51 which is used to operate the analog switch assembly 28 and generated from the first controller 32 is synchronized with the main picture signal. The luminance signal selected by the analog switch assembly 28 is in turn applied to the adder 30 whereas the red-color difference signal and the blue-color difference signal which have been selected by the analog switch assembly 28 are, before being supplied to the adder 30, modulated by the chroma modulator 29 into a color subcarrier wave. The adder 30 performs a summation of the luminance signal and the color subcarrier wave both applied thereto from the analog switch assembly 28 thereby to provide a synthesized color composite video signal at the output terminal 31.
While the prior art video signal synthesizer is constructed as hereinbefore described, it has been found disadvantageous in that, since demodulation and modulation are conducted on the main picture signal which does not require time-compression, this leads to not only complication of the apparatus itself, but also reduction in quality of the picture being reproduced. Moreover, the use of time-division multiplexing requires the use of the switch assembly of three switching circuit systems and, therefore, when it is desired to increase the number of sub-pictures that can be reproduced through a cathode ray tube display, the apparatus requires a correspondingly increased manufacturing cost.